Data Acquisition (DAQ) and Control from Microstar Laboratories

Input Triggering Technology

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Technology

 

System Architecture

 

DAP Architecture

 

Processing

 

Networking

Input Overview

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Single-Sample Clocking

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Channel List Clocking

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Gated

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Burst

One-Shot Triggering with Single-Sample Clocking

After triggering and synchronizing to the clocking signal, one sample is captured on each clock pulse.

animated example of one-shot triggering with single-sample clocking

Triggering is supported on all DAP models, including the DAP 4000a.

Notes:

  1. Clock source can be external (extClk) or internal onboard (iClk)
  2. Trigger is active high, held for at least tTrigMin
  3. Clock period must be at least tSynch + TIME specification
  4. All clock levels must be held for at least tExtClkPW
  5. Clocking activity begins tTCsetup after triggering goes active
  6. After setup delay, sampling occurs on clock pulses
  7. Digitized values issued after conversion delay
  8. Without burst mode, one-shot triggering responds only once